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  • FPGA Design Engineer

    22000 - 29000 zł

     ...related field 5+ years (Mid-level) or 8+ years for Senior-level of hands-on experience in FPGA design and development. Proficient in any VHDL/Verilog/SystemVerilog for RTL design. Knowledge of ASIC design process. Experience with timing analysis, synthesis, and... 
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    Praca zdalna
    Pełny etat
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    Resquant

    Warszawa
    24 dni temu

  • FPGA Verification Engineer

    22000 - 29000 zł

     ...field. 5+ years (Mid-level) or 8+ years (Senior-level) of hands-on experience in FPGA verification and development. Proficiency in VHDL, Verilog, or SystemVerilog for RTL verification. Knowledge of the ASIC design process. Experience with VUnit, cocotb, or UVM. Ability... 
    Zasugerowane
    Praca zdalna
    Pełny etat
    Umowa o pracę
    Elastyczne godziny

    Resquant

    Warszawa
    24 dni temu